Thursday, 1 September 2016
Syllabus Structured System Analysis and Design

NIELIT A Level July, 2010 A4-R4: COMPUTER SYSTEM ARCHITECTURE
NIELIT A Level July, 2010
A4-R4: COMPUTER SYSTEM ARCHITECTURE
PART ONE
(Answer all the questions)
1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following
instructions therein. (1x10)1.1 Which of the following is NOT the key distinguishing feature of a microprocessor
A) Clock Speed
B) L1 Cache
C) Number of transistors
D) Capacity of the Hard Disk
1.2 The two's complement of binary number 11001 is
A) 00111
B) 00110
C) 11000
D) 11001

Nielit A Level January, 2011 A4-R4: COMPUTER SYSTEM ARCHITECTURE
Nielit A Level January, 2011
A4-R4: COMPUTER SYSTEM ARCHITECTURE
PART ONE
(Answer all the questions)
1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following instructions therein. (1x10)
A) multiplying the number by 2
B) dividing the number by 2
C) changing the sign of the number
D) reversing the number
1.2 The computer can be interrupted if
A) IEN= 0, FGI=0
B) IEN= 0, FGI=1
C) IEN= 1, FGI=0
D) IEN= 1, FGI=1

Nielit A Level July, 2011 A4-R4: COMPUTER SYSTEM ARCHITECTURE
Nielit A Level July, 2011
A4-R4: COMPUTER SYSTEM ARCHITECTURE
PART ONE
(Answer all the questions)
1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following instructions therein. (1x10)
1.1 The hardware which is responsible for executing machine language instructions can be builtusing large number of few basic building blocks, which are called
A) Control Unit
B) CPU
C) Logic gates
D) None of the above
1.2 The output depends both on the current inputs as well as on how it got to the current state in
A) Combinational circuits
B) Sequential circuits
C) In both – combinational and sequential circuits
D) None of the above

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