Wednesday, 31 August 2016

A Level January, 2012 A4-R4: COMPUTER SYSTEM ARCHITECTURE

A Level  January, 2012
A4-R4: COMPUTER SYSTEM ARCHITECTURE

TOTAL TIME: 3 HOURS TOTAL MARKS: 100
(PART ONE – 40; PART TWO – 60)
PART ONE
(Answer all the questions)
1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following instructions therein. (1x10)
1.1 The circuit given below is
nielit a level paper

A) Combinational
B) Sequential
C) Hybrid
D) Analog
1.2 Which one of the following is universal gate?
A) AND
B) OR
C) NOR
D) NOT

A Level July, 2012 A4-R4: COMPUTER SYSTEM ARCHITECTURE

A Level July, 2012
A4-R4: COMPUTER SYSTEM ARCHITECTURE

TOTAL TIME: 3 HOURS TOTAL MARKS: 100
(PART ONE – 40; PART TWO – 60)
PART ONE
(Answer all the questions)
1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following instructions therein. (1x10)

1.1 A combinational circuit which performs arithmetic addition of three bits is called
A) Half–adder
B) Full–adder
C) Double–adder
D) None of the above
1.2 Storage capabilities are not provided in
A) ROM
B) RAM
C) Secondary Storage
D) None of the above

A Level January, 2013 A4-R4: COMPUTER SYSTEM ARCHITECTURE

A Level January, 2013
A4-R4: COMPUTER SYSTEM ARCHITECTURE


TOTAL TIME: 3 HOURS TOTAL MARKS: 100
(PART ONE – 40; PART TWO – 60)
PART ONE
(Answer all the questions)

1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “tear-off” answer sheet attached to the question paper, following instructions therein. (1x10)
1.1 Conversion of hexadecimal number 6B2 to its binary number equivalent is
A) 111100011011
B) 011011010101
C) 011010110010
D) 011011000010
1.2 Which of the following registers is used to keep track of the address of the next instruction?
A) Memory Address Register
B) Instruction Register
C) Program Counter
D) Memory Data Register

A Level July, 2013 A4-R4: COMPUTER SYSTEM ARCHITECTURE

A Level July, 2013
A4-R4: COMPUTER SYSTEM ARCHITECTURE


TOTAL TIME: 3 HOURS TOTAL MARKS: 100
(PART ONE – 40; PART TWO – 60)
PART ONE
(Answer all the questions)

1. Each question below gives a multiple choice of answers. Choose the most appropriate one and enter in the “OMR” answer sheet supplied with the question paper, following instructions therein. (1x10)
1.1 Which one among the following 2 Input logic gates can be used to implement any other 2 Input
Logic gates?
A) AND
B) EX-OR
C) OR
D) NOR
1.2 What is the FAN-OUT of any standard TTL Logic Gate?
A) 2
B) 1
C) 10
D) 5